Tag Archives: hardware design exposure

Managing ‘Hardware Design Exposure’ in Secure Component Development

When designing and implementing general purpose processors with security features, assessing the design’s security and vulnerability to various attacks is a full-time activity. Claims of security are always subject to assessment and testing.

In order to maintain a public claim to secure processing, however, requires another discipline practiced at CPU Tech which we call the management of  ‘Hardware Design Exposure’. A simple definition of design exposure is maintaining the company secrecy of the design itself and the breadth of its capabilities, as well as an internally managed program to carefully select our customers and inventories. Continue reading